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  • Gates and Inverters - Multi-Function, Configurable(94)
Результат:(94)

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    5454FM

    AND-OR-INVERT GATE, TTL

    National Semiconductor

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    54H50FM

    AND-OR-INVERT GATE, TTL

    National Semiconductor

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    54LS51DM

    AND-OR-INVERT GATE, LS SERIES

    National Semiconductor

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    100302W-QMLV

    100302 - OR/NOR GATE, 100K SERIE

    National Semiconductor

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    100302J-QMLV

    OR/NOR GATE, 100K SERIES, 5-FUNC

    National Semiconductor

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    100304W-QMLV

    100304 - AND/NAND GATE, 100K SER

    National Semiconductor

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    100307W-QMLV

    100307 - XOR/XNOR GATE, 100K SER

    National Semiconductor

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    100304J-QMLV

    100304 - AND/NAND GATE, 100K SER

    National Semiconductor

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    100301W-QMLV

    100301 - OR/NOR GATE, 100K SERIE

    National Semiconductor

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    JM38510/07402BCA

    SN54S64 4-2-3-2 INPUT AND-OR-INV

    National Semiconductor

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    JM38510/07401BDA

    SN54S51 AND-OR-INVERT GATES

    National Semiconductor

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    54H62FM

    GATE, TTL

    National Semiconductor

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    54H53FM

    AND-OR-INVERT GATE, TTL

    National Semiconductor

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    JM38510/07402BDA

    IC INVERTER AND 4CH 4-INP 14CFP

    National Semiconductor

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    100164W-MIL

    MULTIPLEXER, 100K SERIES

    National Semiconductor

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    100164J-MIL

    MULTIPLEXER, 100K SERIES

    National Semiconductor

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    935DM

    INVERTER, DTL

    National Semiconductor

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    100104W-MIL

    GATE, ECL100K

    National Semiconductor

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    100117W-MIL

    OR-AND/-INVERT GATE, 100K SERIES

    National Semiconductor

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    100102J-MIL

    OR/NOR GATE, 100K SERIES

    National Semiconductor

  • Total 94
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    Products in the configurable logic gate family perform elementary logic operations on individual logic signals in a fashion similar to standard logic gates, but without the limitation of being constrained to one specific function such as AND, NAND, etc. They are commonly implemented using a small number of logic gates internally, selected and interconnected to allow the overall logic function that is realized to be configured by the choice of which among several inputs the operating data is applied to, and the logic state to which any unused inputs are driven.
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